Stacked multilevel inverter topologies for variable speed drives applications
June 18 @ 3:30 pm - 5:00 pm EDT
The Department of Electrical and Computer Engineering at Concordia University and the Power Electronics Society (PELS) chapter in collaboration with the Industrial Electronics Society (IES), Industry Applications Society (IAS), and Power & Energy Society (PES) chapters in the IEEE Montreal Section cordially invites you to a seminar presented by Prof. K. Gopakumar, Professor at the Department of Electronic Systems Engineering, Indian Institute of Science, India.
Please register using the link provided below.
Many interesting multilevel topologies have been reported for drive applications. But still the most popular topology is the NPC three level especially for medium voltage drives applications. This shows that the industry is still looking for some viable alternative to this, with reduced power circuit complexity and with increased reliability for medium voltage drives applications. The present lecture will focus on some of the recent work from my lab on five-level, nine level and forty-nine level inverter topologies with reduced DC link voltages for variable speed drive applications. In end, elimination of the common point voltage fluctuations due to stacking of cells, with a normal six-phase IM drive will also be discussed.
Speaker(s): Prof. K. Gopakumar,
Bldg: EV Building
1515 Saint-Catherine St W, Montreal, QC H3G 1S6