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Advanced Phase-Locked Loop Algorithms for Modern Power System Applications

July 21 @ 10:30 pm - 11:30 pm

Modern control and protection systems of smart grids rely on the estimation of frequency, amplitude and phase-angle of voltage/current signals. It is known that estimation of the parameters of such signals is crucial for seamless operation of electronically-coupled distributed generation (DG) systems and advanced measurement sensors such as phasor measurement units (PMUs). Moreover, many robust control and islanding detection methods in microgrids, as well as grid synchronization schemes for power electronics systems, depend on accurate estimates of the frequency and phase-angles. Estimation of voltage/current signal parameters has attracted a lot of attention. Various methods have been proposed to improve the parameter estimation in the presence of measurement noise, harmonics, and DC offset. Kalman filtering (KF), discrete Fourier transform (DFT) and Phase-locked loop (PLL) systems have been widely used in communication and power systems. The KF requires an accurate state-space model, the knowledge of the initial covariance matrix, the variance of the process, and that of the measurement noise. On the other hand, frequency variations, inter-harmonics, and spectral interference are challenges to the DFT-based methods. Unlike the KF and DFT based methods, the PLL provides a stable and accurate reference for synchronization despite the system oscillations and distortions. Moreover, the PLL has a simple and robust structure for implementations in digital platforms. Noise immunity and disturbance rejection capabilities of a PLL can be enhanced at the cost of computation time and stability characteristics. To overcome such challenges, new and advanced PLLs have been proposed that improve the parameter estimation by utilizing different filtering techniques.

In this talk, several PLL structures will be presented and discussed. In particular, the conventional single-phase PLL, synchronous reference frame PLL (SRF-PLL), enhanced PLL (ePLL), and unified three-phase signal processor (UTSP) will be studied in details, and their performances are compared using MATLAB simulations. This presentation will be suitable for researchers and engineers from power systems and control disciplines.

Speaker(s): Houshang Karimi,



July 21
10:30 pm - 11:30 pm




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