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Preventing RFIC interference issues: floorplan development, isolation- and grounding strategy

May 17, 2016 @ 6:00 pm - 8:00 pm

In order to minimize interference issues and coupling effects in RF products, it is essential to apply proper floorplanning and grounding strategies. The interaction of the IC with its physical environment needs to be accounted for, such as to certify that the final packaged and mounted product meets the specifications.

The presentation will focus on the key requirements to address physical design issues in the early design phases of complex RF design. Typical physical design issues encountered, such as on-chip coupling effects, chip-package interaction, substrate coupling and co-habitation, will be discussed. Some examples of successful RFIC floorplanning and grounding strategies as applied in NXP products will be given.

Speaker(s): Dr. Jan Niehof,

Location:
Room: EV2.260
Bldg: Concordia University, EV Building
1515 Ste. Catherine West
Montreal, Quebec

Details

Date:
May 17, 2016
Time:
6:00 pm - 8:00 pm
Website:
http://meetings.vtools.ieee.org/m/39606

Organizer

[email protected]

Venue

Room: EV2.260, Bldg: Concordia University, EV Building